Signal processing generally refers to the performance of real-time operations on a data stream. Accordingly, typical signal processing applications include or occur in telecommunications, image processing, speech processing and generation, spectrum analysis and audio processing and filtering. In each of these applications, the data stream is generally continuous. Thus, the signal processor must produce results. "through-put", at the maximum rate of the data stream.
Conventionally, both analog and digital systems have been utilized to perform many signal processing functions. Analog signal processors, though typically capable of supporting higher through-put rates, are generally limited in terms of their long term accuracy and the complexity of the functions that they can perform. In addition, analog signal processing systems are typically quite inflexible once constructed and, therefore, best suited only to the singular application anticipated in their initial design.
A digital signal processor provides the opportunity for enhanced accuracy and flexibility in the performance of operations that are very difficult, if not impractically complex, to perform in an analog system. Additionally, digital signal processor systems typically offer a greater degree of post-construction flexibility than their analog counterparts, thereby permitting more functionally extensive modifications to be made for subsequent utilization in a wider variety of applications. Consequently, digital signal processing is preferred in many applications.
The process of digital signal processing typically implements a numeric algorithmic operation performed on a digital data stream sampled over time. The end result of the algorithmic operation, depending on the nature of the algorithm, can readily provide for the modification or analysis of the digital data stream or for the generation of a new data stream based on some aspect of the original data stream input. Central to the implementation of such algorithmic operations are the use of numeric algorithms for performing differential equation solving, Fourier transforms, auto-correlation and digital filtering, among many others. A numeric Fourier equation solving algorithm generally takes the form of: EQU y(n)=ax(n)+bx(n-1)+cx (n-2),
where y(n) is the current output and x (n-k) is the current input at a time k previous (k=0,1,2,3 . . .). Discrete or digital Fourier transforms, of the form: ##EQU1## where k=0,1,2,3, . . .(n-1) with X(k) being the discrete transform of the digitally sampled signal X(n), are easier to implement numerically.
Alternately, decimation in time or frequency can be utilized to obtain substantially the same information. A decimation in time numeric algorithm generally takes the form of: EQU X=A+WB EQU Y=A-WB,
where A and B are of a time series of inputs represented as complex numbers, W is a decimation function and X and Y are decimated outputs. The decimation in time and frequency algorithms have the advantage of reduced numbers of multiplications and accumulations and the convenience of being executable within the same memory space that originally stores a series segment of the digital data stream being operated on.
A numeric implementation of the auto-correlation function is defined as: ##EQU2## where R(k) is the kth auto-correlation co-efficient and x(n) is the nth data sample.
Finally, a numeric digital filtering function may be generally defined as: ##EQU3## where Y(n) is the filter output on its nth iteration, A.sub.i is the ith filter co-efficient and x(n-i) is the data sample taken as the input at the nth iteration. It is to be recognized that each of these algorithms may require simultaneous access to two data values, or "operands" as they are called, in real-time processing.
There are many different approaches to implementing digital signal processors, each with its own strength and weaknesses. One approach has been to utilize a high speed digital multiplier circuit combined with a bit slice microprocessor. While this form of a digital signal processor is capable of obtaining extremely high through-put rates, its design and implementation is complex and often unique. Further, a multiplier-based signal processor has substantial power usage and physical space requirements.
To circumvent the complexities of the multiplier-based digital signal processor designs, though at a loss of some of the through-put rate capacity, component chip sets have been used. Each component chip is typically a monolithic unit designed specifically to function as part of the chip set and to support a particular aspect of the digital signal processor. Such chips may include a program sequencer chip, address generator chip and an arithmetic logic and shift unit chip. To its advantage, the system design complexity of realizing a completed digital signal processor, based on a chip set, is substantially reduced. Also the power usage and physical space requirements of the signal processor are similarly reduced.
Unfortunately, the loss in data through-put is directly linked to the multiple external interconnections required between the chips of the chip set. These external links impose a timing restriction that is not present in the data transfer between portions of the digital signal processor as implemented on a monolithic chip.
Accordingly, there is a substantial desire to implement a complete digital signal processor as a monolithic unit. Not only will this further reduce the power and physical space requirements of the processor system, but it will also provide an opportunity to substantially regain and maximize the data through-put capability of the processor.
The implementation of completely monolithic digital signal processors, however, is not without its constraints. The numeric algorithms implemented by many of the signal processing functions require a substantial amount of complex circuitry. Generally, little of this circuitry can be simply omitted, since to do so would directly compromise the flexibility of the monolithic digital signal processor in handling a variety of signal processing operations. Additionally, extensive generalization of the processing functions, thereby reducing the number of functional subcircuits required, imposes substantial time penalties as the processor's efficiency in performing specific functional operations is reduced. Further, there are practical limitations on the monolithic chip die size, generally related to fabrication yield and accurate reproducability, as well as power dissipation. Monolithic digital signal processors therefore face a loss of flexibility in order not to drastically compromise operating speed.
In view of the problems related to each of the various digital signal processor implmentations, a significant objective of those of skill in the art of designing and utilizing digital signal processors is to provid a digital signal processor system architecture that combines optimally featured flexibility with the capability of supporting a high data through-put rate while further being sufficiently compact for monolithic implementation. Naturally, the implementation must provide sufficient speed and efficiency of operation to operate at the desired peak data through-put rate as well as the flexibility to execute a wide variety of numeric algorithmic signal processing operations.
Of particular importance, is a memory management portion of the real-time digital signal processor which facilitates implementation of the various numeric algorithms described earlier, particularly insofar as they require simultaneous access to two data values stored in memory. Moreover, such memory management should provide flexible memory addressing, such as so-called "direct addressing" and "indirect addressing" of the data values in memory. An additional desirable feature of memory management is provision of automatic, hardware-based, modulo (n) address spaces. In the prior art, a user had to monitor memory accesses and design programs to assure integrity of memory boundaries.
In addition, the memory management portion should permit accessing a memory external to the monolithic device housing the digital signal processor. Such external memory can, for example, store data values obtained from, or destined for, a central processing unit (CPU) external to the device. In this fashion, an interface can be established between the digital signal processor and the outside world.